Only available in German
Kolloquium | Enabling the New Semiconductor Revolution through Advances in Design-for-Yield, Design-for-Test, and Fault-Origin Analysis
06.12.22 | MZH 4380 | 10:00 Uhr
Informatik-Kolloquium
Im Rahmen des offiziellen Informatik-Kolloquiums laden wir ein:
Abstract
During the past year, there has been a remarkable resurgence worldwide in semiconductor research
and investments in microelectronics education. For example, the CHIPS and Science Act in the United
States provides over $50 billion for semiconductor research, development, manufacturing, and
workforce development. In response, major semiconductor companies such as Micron. Qualcomm,
and GLOBALFOUNDRIES have already committed an additional $50 billion for chip manufacturing.
These developments provide an unprecedented opportunity for university research and
university/industry/government partnerships in semiconductors. In this talk, I will first provide an
overview of our research on design-for-testability of 3D integrated circuits, silicon lifecycle
management, microfluidics, and hardware security, which all involve close industry collaborations. I
will next describe in more detail our recent work on design-for-yield that targets manufacturing
imperfections for layouts based on emerging carbon nanotube field-effect transistors. Following this,
I will present our ongoing work on built-in self-test of monolithic 3D integrated circuits. Finally, I will
describe a test and diagnosis technique to characterize fault origins in inter-tier vias and resistive
random-access memories for monolithic 3D integration.
Zoom Zugangsdaten erfragen Sie gerne bei
Lisa Jungmann.
