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Erfolgreiche Verteidigung der Dissertation

Dr. Payam Habiby

Dr. Payam Habiby hat seine Dissertation "Enhancing Design for Testability Using Formal, Evolutionary, and Graph-Based Techniques" erfolgreich verteidigt.

Manufacturing test as an effective approach to ensure the production of fault-free devices is closely tied to the design process by employing design-for-testability techniques. A high-quality test mechanism requires a suitable scan infrastructure to provide effective access to on-chip components. Despite their efficacy in small ICs, the legacy scan networks suffer from major drawbacks in modern System-on-Chips (SoCs), resulting in long test times and high test costs. The IEEE Std. 1687 (IJTAG) has been introduced to tackle this issue by incorporating programmable components and enabling the design of reconfigurable scan networks. However, effective access schedulers are still required to minimize test time in IJTAG networks. Furthermore, the network topology itself significantly impacts its efficiency in terms of area, time, and routing overhead. This thesis aims to improve the design-for-testability of integrated circuits by employing formal, evolutionary, and graph-based techniques to propose methodologies for the optimized design and application of multi-power domain IJTAG scan networks.

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