Authors
Robert Wille,
Rolf Drechsler
ISBN 9048195780
Ordering:
Book Summary:
The development of computing machines found great success in the last decades. But the ongoing
miniaturization of integrated circuits will reach its limits in the near future. Shrinking
transistor sizes and power dissipation are the major barriers in the development of smaller and
more powerful circuits. Reversible logic provides an alternative that may overcome many of these
problems in the future. For low-power design, reversible logic offers significant advantages since
zero power dissipation will only be possible if computation is reversible. Furthermore, quantum
computation profits from enhancements in this area, because every quantum circuit is inherently
reversible and thus requires reversible descriptions. However, since reversible logic is subject
to certain restrictions (e.g. fanout and feedback are not directly allowed), the design of
reversible circuits significantly differs from the design of traditional circuits. Nearly all
steps in the design flow (like synthesis, verification, or debugging) must be redeveloped so
that they become applicable to reversible circuits as well. But research in reversible logic is
still at the beginning. No continuous design flow exists so far. In Towards a Design Flow for
Reversible Logic, contributions to a design flow for reversible logic are presented. This includes
advanced methods for synthesis, optimization, verification, and debugging. Formal methods like
Boolean satisfiability and decision diagrams are thereby exploited. By combining the techniques
proposed in the book, it is possible to synthesize reversible circuits representing large functions.
Optimization approaches ensure that the resulting circuits are of small cost. Finally, a method for
equivalence checking and automatic debugging allows to verify the obtained results and helps to
accelerate the search for bugs in case of errors in the design. Combining the respective approaches,
a first design flow for reversible circuits of significant size results.
Authors:
Robert Wille received the Diploma and Dr.-Ing. degrees in computer science
from the University of Bremen, Bremen, Germany, in 2006 and 2009, respectively. He is currently
with the Group of Computer Architecture at the University of Bremen. His research interests
include reversible logic and quantum computation, techniques for solving satisfiability problems,
as well as verification of hardware and systems.
Rolf Drechsler received his diploma and Dr. phil. nat. degree in computer science from the J.W.
Goethe-University in Frankfurt am Main, Germany, in 1992 and 1995, respectively. He was with the
Institute of Computer Science at the Albert-Ludwigs-University of Freiburg im Breisgau, Germany
from 1995 to 2000. He joined the Corporate Technology Department of Siemens AG, Munich in 2000,
where he worked as a Senior Engineer in the formal verification group. Since October 2001 he has
been with the University of Bremen, Germany, where he is now a full professor for computer
architecture. His research interests include data structures logic synthesis, test, and
verification.
