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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen
Only available in German

Digital System Modelling
H | 03-IMVP-DSM

This is course is part of the Neuroscience Master curriculum. It is not offered for students outside this programme.

This course is given in English

State-of-the-art experimental paradigms and applications in neuroscience require fast analysis of an increasing numbers of neural signals using sophisticated algorithms, and the ability to communicate directly with miniaturized neurotechnology in low-power environments. This module provides the knowledge for using digital circuit logic (Verilog and HLS flow) to create hardware-based implementations of different data analysis algorithms to decrease their execution time, and for establishing closed-loop paradigms for data acquisition and stimulation control.

Lecture:
  • Basics of digital logics
  • Introduction into Verilog hardware description languages MN-DSM / Digital Systems Modeling module code / module title
  • Introduction into FPGA architecture and design process
  • Fundamentals of C programming language required to learn high-level synthesis (HLS)
  • Introduction to HLS design flow and its importance in the hardware-based implementation of various applications.

Practical work and exercises:
  • Modeling simple digital logic and hardware blocks in Verilog
  • Modeling hardware blocks related to parallel programming in Verilog
  • Introduction to HLS tools
  • Implementing different parallel programming related applications using HLS

Veranstalter:
Dr. Muhammad Hassan

Ort & Zeit:
Vorlesung: Mo, 8-10 Uhr MZH 1450
Übung: Fr, 14-17 Uhr MZH 5600


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