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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

Sajjad Parvin, M.Sc.


As a goal of my research project OptiSecure, I would like to provide security for integrated circuits at the transistor level against non-invasive attacks, in particular optical-probing attacks. Currently, integrated circuits are vulnerable to the optical-probing attack, hence the intellectual properties and information can be hijacked using this technique. As a goal of my research, I would like to design secure circuits and architectures to combat such side-channel attacks. This is an important step to make circuits more secure toward this novel attack.

Research Staff

+49 421 218-63949

MZH 4208

parvin@uni-bremen.de

Lower the RISC: Designing optical-probing-attack-resistant cores
Author: Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Jorunal: Microprocessors and Microsystem
Details: DOI: 10.1016/j.micpro.2024.105121 (2024)

OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files
Author: Sajjad Parvin, Mehran Goli, Frank Sill Torres, and Rolf Drechsler
Jorunal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2024.3470669 (2024)

True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET
Author: Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, and Rolf Drechsler
Conference: International Conference on VLSI Design 2025
Pdf | Reference: Bangalore, India, 2025

Hidden Cost of Circuit Design with RFETs
Author: Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Valencia, Spain, 2024

RADOPA: Robustifying a Design Against Optical Probing Attacks
Author: Sajjad Parvin, Rolf Drechsler
Conference: The premier open source silicon conference (ORConf)
Reference: Munich, Germany, 2023

Hidden in Plain Sight: A Detailed Investigation of Selectively Increasing Local Density to Camouflage and Robustify Against Optical Probing Attacks
Author: Sajjad Parvin, Chandan Kumar Jha, Sallar Ahmadi-Pour, Frank Sill Torres, and Rolf Drechsler
Conference: IEEE International Test Conference India (ITC India)
Pdf | Reference: Bengaluru, India, 2023

Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core
Author: Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Conference: IEEE INTERNATIONAL CONFERENCE ON OMNI-LAYER INTELLIGENT SYSTEMS (IEEE COINS)
Pdf | Reference: Berlin, Germany, 2023

LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing
Author: Sajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
Conference: IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Pdf | Reference: Iguazu Falls, Brazil, 2023

FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing
Author: Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Antwerp, Belgium, 2023

Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - a RISC-V Case Study
Author: Sajjad Parvin, Mehran Goli, Frank Sill Torres, and Rolf Drechsler
Conference: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Reference: Tokyo, Japan, 2023

Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design Techniques
Author: Sajjad Parvin, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres and Rolf Drechsler
Conference: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Reference: Taipei, Taiwan, 2022

How Secure Is A Circuit Against Optical Probing? Developed Countermeasures, In Progress Countermeasures Development, and the Future Works
Author: Sajjad Parvin, Frank Sill Torres and Rolf Drechsler
Workshop: 11th International Workshop on Cryptography, Robustness, and Provably Secure Schemes for Female Young Researchers (CrossFyre)
Reference: Passau, Germany, 2022

OPTI-RISK: Design of an Optical Probing Attack Hardened RISC-V Core with an Industrially Compatible CMOS Gate Library
Author: Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, and Rolf Drechsler
Workshop: 5th RISC-V Activity Workshop
Reference: Berlin, Germany, 2022

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