In der Forschung befasse ich mich mit dem Problem der Logiksynthese.
Der Schwerpunk liegt bei der Synthese und Minimierung von reversiblen Logik Funktionen. Diese sind von Wichtigkeit in der Entwicklung von Quanten Computern.
Ancilla-free synthesis of large reversible functions using binary decision diagrams
Autor: Mathias Soeken, Laura Tague, Gerhard W. Dueck, Rolf Drechsler
Zeitschrift: Journal of Symbolic Computation
Details: DOI 10.48550/arXiv.1408.3955 (2015)
Debugging Reversible Circuits
Autor: Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
Zeitschrift: INTEGRATION, the VLSI Journal
Details: DOI: 10.1016/j.vlsi.2010.08.002, Volume 44, Number 1, pp. 51-61, January (2011)
Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits
Autor: Md. Mazder Rahman, Gerhard W. Dueck, Anupam Chattopadhyay, Robert Wille
Konferenz: 46th International Symposium on Multiple-Valued Logic (ISMVL) Pdf | Referenz: Sapporo, Japan, 2016
Synthesizing Reversible Circuits for Irreversible Functions
Autor: D. Michael Miller, Robert Wille, Gerhard W. Dueck
Konferenz: Euromicro Conference on Digital System Design (DSD) Pdf | Referenz: pp. 749-756, Patras, 2009
Debugging of Toffoli Networks
Autor: Robert Wille, Daniel Große, Stefan Frehse, Gerhard W. Dueck, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE) Pdf | Referenz: pp. 1284-1289, Nice, 2009
Reversible Logic Synthesis with Output Permutation
Autor: Robert Wille, Daniel Große, Gerhard W. Dueck, Rolf Drechsler
Konferenz: 22nd International Conference on VLSI Design Pdf | Referenz: pp. 189-194, New Delhi, 2009
Exact Synthesis of Elementary Quantum Gate
Circuits for Reversible Functions with Don’t Cares
Autor: Daniel Große, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Konferenz: 38th International Symposium on Multiple-Valued Logic 2008 (ISMVL '08) Pdf | Referenz: pp. 214-219, Dallas Received IEEE Young Researcher Award, 2008
Quantified Synthesis of Reversible Logic
Autor: Robert Wille, Hoang M. Le, Gerhard W. Dueck, Daniel Große
Konferenz: Design, Automation, and Test in Europe (DATE) Pdf | Referenz: pp. 1015-1020, Munich, 2008
Exact SAT-based Toffoli Network Synthesis
Autor: Daniel Große, Xiaobo Chen, Gerhard W. Dueck, Rolf Drechsler
Konferenz: Great Lakes Symposium on VLSI (GLSVLSI) Pdf | Referenz: pp. 96-101, Stresa, 2007
Self-Inverse Functions and Palindromic Circuits
Autor: Mathias Soeken, Michael Kirkedal Thomsen, Gerhard W. Dueck, D. Michael Miller
Workshop: Reed-Muller Workshop
Referenz: Waterloo, Canada, pre-print available at arXiv:1502.05825, 2015
Synthesising Reversible Circuits from Irreversible Specifications using Reed-Muller Spectral Techniques
Autor: D. Michael Miller, Gerhard W. Dueck, Robert Wille
Workshop: Reed-Muller Workshop
Referenz: Naha, Okinawa, 2009
Reversible Logic Synthesis with Output Permutation
Autor: Robert Wille, Daniel Große, Gerhard W. Dueck, Rolf Drechsler
Workshop: International Workshop on Boolean Problems
Referenz: Freiberg, 2008