VP Modeling and Simulation Techniques
Virtual Prototype Driven Application Specific Hardware Optimization (FDL 2023)
Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype (2022)
RISC-V AMS VP: An Open Source Evaluation Platform for Cyber-Physical Systems (FDL 2021)
Adaptive Simulation with Virtual Prototypes in an Open-Source RISC-V Evaluation Platform (JSA 2021)
Extensible and Configurable RISC-V based Virtual Prototype (FDL 2018)
VP Verification
Verifying SystemC TLM Peripherals using Modern C++ Symbolic Execution Tools (DAC 2022)
Verifying Instruction Set Simulators using Coverage-guided Fuzzing (DATE 2019)
RISC-V Compliance Testing
Towards RISC-V CSR Compliance Testing (JSA 2021)
Mutation-based Compliance Testing for RISC-V (ASP-DAC 2021)
Closing the RISC-V Compliance Gap: Looking from the Negative Testing Side (DAC 2020)
Towards Specification and Testing of RISC-V ISA Compliance (DATE 2020)
VP-based Security Evaluation
SW Verification
SymEx-VP: An open source virtual prototype for OS-agnostic concolic testing of IoT firmware (2022)
Automated Detection of Spatial Memory Safety Violations for Constrained Devices (ASP-DAC 2022)
RVX - A Tool for Concolic Testing of Embedded Binaries Targeting RISC-V Platforms (ATVA 2020)
Early Concolic Testing of Embedded Binaries with Virtual Prototypes: A RISC-V Case Study (DAC 2019)
RTL Platform
MicroRV32: An Open Source RISC-V Cross-Level Platform for Education and Research (DESTION 2021)
Cross-Level Verification
Constrained Random Verification for RISC-V: Overview, Evaluation and Discussion (MBMV 2021)
Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study (FDL 2020)