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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

M.Sc. Luca Müller


I investigate the verification of embedded system in the scope of the Scale4Edge research project. Here, I especially consider the interface between hardware and software. Another one of my research interests is formal verification.

Research Staff

+49 421 218-59851

MZH 4194

lucam@uni-bremen.de

SAT can Ensure Polynomial Bounds for the Verification of Circuits with Limited Cutwidth
Author: Luca Müller, Rolf Drechsler
Conference: Euromicro Conference Series on Digital System Design (DSD)
Pdf | Reference: Paris, France, 2024

Finding Optimal Implementations of Non-native CNOT Gates using SAT
Author: Philipp Niemann, Luca Müller, Rolf Drechsler
Conference: Reversible Computation (RC)
Pdf | Reference: Nagoya, Japan, 2021

Combining SWAPs and Remote CNOT Gates for Quantum Circuit Transformation
Author: Philipp Niemann, Luca Müller, Rolf Drechsler
Conference: Euromicro Conference on Digital System Design (DSD)
Pdf | Reference: Palermo, Sicily, Italy, 2021

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