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Buchbeiträge

SyReC: A Programming Language for Synthesis of Reversible Circuits
Autor: Robert Wille, Sebastian Offermann, Rolf Drechsler
Buchtitel: System Specification and Design Languages: Selected Contributions from FDL 2010 | Herausgeber: Tom J. Kazmierski, Adam Morawiec
Verlag: Springer
Format: Hardcover (2012)

Konferenzbeiträge

Efficient Realization of Control Logic in Reversible Circuits
Autor: Sebastian Offermann, Robert Wille, Rolf Drechsler
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: Oldenburg, 2011

SyReC: A Programming Language for Synthesis of Reversible Circuits
Autor: Robert Wille, Sebastian Offermann, Rolf Drechsler
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: pp. 184-189, Southampton, 2010
Received Best Paper Award

Synthesizing Multiplier in Reversible Logic
Autor: Sebastian Offermann, Robert Wille, Gerhard W. Dueck, Rolf Drechsler
Konferenz: 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Pdf | Referenz: pp. 335-340, Vienna, 2010

Workshopbeiträge

SyReC: A Programming Language for Synthesis of Reversible Circuits
Autor: Robert Wille, Sebastian Offermann, Rolf Drechsler
Workshop: International Workshop on Logic Synthesis (IWLS)
Referenz: Irvine, 2010

SyReC: A Programming Language for Synthesis of Reversible Circuits
Autor: Robert Wille, Sebastian Offermann, Rolf Drechsler
Workshop: 13. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen"
Referenz: Dresden, 2010

Dipl.-Inf. Dipl.-Math. Sebastian Offermann

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