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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

Kemal Çağlar Coşkun, M.Sc.


I am interested in the verification of complex heterogeneous systems. My current goal is to increase the confidence in high-level verification of SystemC AMS models by showing equivalence between SystemC AMS representations and low-level representations of heterogeneous systems.

Research Staff

Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits
Author: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Jorunal: Chips
Details: DOI 10.3390/chips1010006, Volume 1, Issue 1, pp. 54-71 (2022)

Formal Verification of Error Bounds for Resistive-Switching-based Multilevel Matrix-Vector Multipliers
Author: Kemal Çağlar Coşkun, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
Conference: International Symposium on Quality Electronic Design (ISQED'25)
Pdf | Reference: San Francisco, USA, 2025

Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent
Author: Kemal Çağlar Coşkun, Muhammad Hassan, Lars Hedrich, Rolf Drechsler
Conference: Design Automation Conference (DAC)
Pdf | Reference: San Francisco, USA, 2024

Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits
Author: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Antwerp, Belgium, 2023

Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters
Author: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Conference: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Pdf | Reference: Prague, Czech Republic, 2022

Automated Formal Verification Methodology for MAGIC Design Style Based In-Memory Computing
Author: Chandan Kumar Jha, Khushboo Qayyum, Kemal Çağlar Coşkun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
Workshop: International Workshop on Logic & Synthesis (IWLS)
Reference: EPFL, Lausanne, Switzerland, 2023

New Directions for Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits
Author: Kemal Çağlar Coşkun, Muhammad Hassan and Rolf Drechsler
Workshop: 35. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ)
Pdf | Reference: Erfurt, Germany, 2023

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