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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

Jan Kleinekathöfer, M.Sc.

My field of research is the formal verification of complex circuits as well as the complexity analysis of the verification process. Different approaches are capable of verifying specific groups of circuits efficiently. The goal of my work is to prove efficient verification for sets of circuits with a given method and to develop new approaches for types of circuits which are not easily verifiable with other techniques.

Research Staff

+49 421 218-64440

MZH 4300


Polynomial Formal Verification of Floating Point Adders
Author: Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Antwerp, Belgium, 2023

Verifying Safety Properties of Robotic Plans operating in Real-World Environments via Logic-based Environment Modeling
Author: Tim Meywerk, Marcel Walter, Vladimir Herdt, Jan Kleinekathöfer, Daniel Große, Rolf Drechsler
Conference: 9th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA)
Pdf | Reference: Rhodes, Greece, 2020

Polynomial Formal Verification exploiting Constant Cutwidth
Author: Mohamed Nadeem, Jan Kleinekathöfer, Rolf Drechsler
Workshop: International Workshop on Rapid System Prototyping (RSP)
Pdf | Reference: Hamburg, Germany, 2023

Polynomial Formal Verification of Adder Circuits Using Answer Set Programming
Author: Mohamed Nadeem, Jan Kleinekathöfer and Rolf Drechsler
Workshop: 2023 Reed-Muller Workshop (RM2023)
Pdf | Reference: Matsue, Shimane, Japan, 2023

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