Dear interested parties,

In our working group, it has proven successfully that interesting topics for Bachelor's and Master's theses are worked out in a personal dialogue. Thus, we do not offer a fixed list of predefined topics.

Please do not hesitate to contact us personally, by phone or email to arrange an appointment to discuss a potential topic.

Possible thesis topics include:

• Design methodology for quantum computers
• Formal verification of processors
• Approximate computing in arithmetic circuits
• Test pattern generation for integrated circuits
• Application of neural networks in circuit design
• ...

To get an idea of the broad spectrum of the topics, the already completed theses are listed below:

All	Bachelor	Master	Diploma
2024
2023
2022
2021
2020
2019
2018
2017
2016
2015
2014
2013
2012
2011
2010
2009
2008
2007
2006
2005

Master 2022

Name	Topic
Christian Friedrich Coors	Verification of Programs Generated from HDL for the Programmable Logic-In-Memory (PLiM) Architecture
Jan Kleinekathöfer	Formal Verification of Floating Point Adders in Polynomial Time
Leon Klimasch	Verfahren zur automatisierten Generierung eines Digital Twins für die Berechnung der Goldenen LBIST Signatur
Rune Krauss	Speichereffizienter Aufbau von binären Entscheidungsdiagrammen für Logiksynthese und Verifikation durch Ausnutzung von Ordnungseigenschaften
Mathis Logemann	Design, Implementierung und Cross-level Verifikation eines SpinalHDL-basierten RISC-V Interrupt Controllers
Arbnor Miftari	Development of New Software Tests for Robotic Motion Plans Through Mutation Testing
Lennart Ove Weingarten	Formaler Nachweis von Schaltkreisen auf Polynomiale Verifizierbarkeit
Jan Zielasko	Visualization of Symbolic Execution 3D Visualization of Symbolic Program Execution-Traces Generated by Instrumentation of a RISC-V Virtual Prototype

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