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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

Khushboo Qayyum, M.Sc.


My research revolves around automated proofing techniques like BDDs and SAT solvers as part of modern verification methods. Currently I am focusing on examining these proofing techniques and optimizing them for verification of complex embedded systems using heuristics at various levels.

Research Staff

Start Small But Dream Big: On Choosing a Static Variable Order for Multiplier BDDs
Author: Khushboo Qayyum, Alireza Mahzoon, Rolf Drechsler
Booktitle: Advanced Boolean Techniques | Editor: Rolf Drechsler, Sebastian Huhn (Eds.)
Publisher: Springer
Format: DOI 10.1007/978-3-031-28916-3 (2023)

Correct and Verify - CAV: Exploiting Binary Decision Diagrams to Enable Formal Verification of Approximate Adders with Correct Carry Bits
Author: Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
Jorunal: IEEE Transactions on Circuits and Systems I: Regular Papers
Details: DOI: 10.1109/TCSI.2024.3509013 (2024)

EnR: Extend and Reduce Methodology to Enable Formal Verification of Truncated Adders
Author: Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
Jorunal: it-Information Technology
Details: DOI: 10.1515/itit-2024-0068 (2024)

veriSIMPLER : An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing
Author: Chandan Kumar Jha, Khushboo Qayyum, Kemal Çaglar Coskun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
Jorunal: IEEE Transactions on Circuits and Systems I: Regular Papers
Details: DOI: 10.1109/TCSI.2024.3424682 (2024)

Large Language Models (LLMs) for Verification, Testing, and Design
Author: Chandan Kumar Jha, Muhammad Hassan, Khushboo Qayyum, Sallar Ahmadi-Pour, Kangwei Xu, Ruidi Qiu, Jason Blocklove, Luca Collini, Andre Nakkab, Ulf Schlichtmann, Grace Li Zhang, Ramesh Karri, Bing Li, Siddharth Garg, Rolf Drechsler
Conference: IEEE European Test Symposium (ETS)
Pdf | Reference: Tallinn, ESTONIA, 2025

FARAD: Automated Formal Verification of Approximate Restoring Array Dividers
Author: Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, and Rolf Drechsler
Conference: International Conference on VLSI Design
Pdf | Reference: Bangalore, India, 2025

LLMs for Hardware Verification: Frameworks, Techniques, and Future Directions
Author: Khushboo Qayyum, Sallar Ahmadi-Pour, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
Conference: IEEE Asian Test Symposium (ATS)
Pdf | Reference: Ahmedabad, India, 2024

From Bugs to Fixes: HDL Bug Identification and Patching using LLMs and RAG
Author: Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler
Conference: LLM-Aided Design, 2024 (LAD)
Pdf | Reference: San Jose, CA, USA, 2024

Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification
Author: Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler
Conference: Great Lakes Symposium on VLSI (GLSVLSI)
Pdf | Reference: Tempa Bay Area, Florida, USA , 2024

Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification
Author: Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler
Conference: Design Automation Conference (DAC)
Pdf | Reference: San Francisco, USA, 2024

LLM-guided Formal Verification Coupled with Mutation Testing
Author: Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Valencia, Spain, 2024

Monitoring the Effects of Static Variable Orders on the Construction of BDDs
Author: Khushboo Qayyum, Alireza Mahzoon, Rolf Drechsler
Conference: International Interdisciplinary Conference on Mathematics, Engineering and Science (MESIICON)
Pdf | Reference: Virtual Conference, 2022

Extend and Reduce Methodology to Enable Formal Verification of Truncated Adders
Author: Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
Workshop: 16th International Workshop on Boolean Problems (IWSBP)
Reference: Bremen, Germany, 2024

LLM-Assisted High Quality Invariants Generation for Formal Verification
Author: Khushboo Qayyum, Sallar Ahmadi-Pour, Muhammad Hassan, Chandan Kumar Jha, Rolf Drechsler
Workshop: University Fair at Design, Automation and Test in Europe (DATE)
Reference: Valencia, Spain, 2024

Automated Formal Verification Methodology for MAGIC Design Style Based In-Memory Computing
Author: Chandan Kumar Jha, Khushboo Qayyum, Kemal Çağlar Coşkun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
Workshop: International Workshop on Logic & Synthesis (IWLS)
Reference: EPFL, Lausanne, Switzerland, 2023

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