Meine Forschung liegt im Bereich des automatischen Debuggings für Eingebettete System. Die Entwicklung von formalen und semi-formalen Methoden steht dabei im Fokus.
Automated Optimization of Scan Chain Structure for Test Compression-Based Designs
Autor: Harshad Dhotre, Mehdi Dehbashi, Ulrike Pfannkuchen, Klaus Hofmann
Konferenz: IEEE Asian Test Symposium (ATS)
Referenz: Hiroshima, Japan, 2016
Automated Formal Verification of X Propagation with Respect to Testability Issues
Autor: Mehdi Dehbashi, Daniel Tille, Ulrike Pfannkuchen, Stephan Eggersglüß
Konferenz: IEEE International Design and Test Symposium 2014 (IDT) Pdf | Referenz: pp. 106-111, Algiers, Algerien, 2014
SAT-Based Speedpath Debugging Using Waveforms
Autor: Mehdi Dehbashi, Görschwin Fey
Konferenz: 19th IEEE European Test Symposium (ETS)
Referenz: Paderborn, Germany, 2014
Debug Automation for Synchronization Bugs at RTL
Autor: Mehdi Dehbashi, Görschwin Fey
Konferenz: 27th International Conference on VLSI Design Pdf | Referenz: pp. 44-49, Mumbai, India, 2014
Automated Post-Silicon Debugging of Failing
Speedpaths
Autor: Mehdi Dehbashi, Görschwin Fey
Konferenz: 21st IEEE Asian Test Symposium (ATS) Pdf | Referenz: pp. 13-18, Niigata, Japan, 2012
On Modeling and Evaluation of Logic Circuits
Under Timing Variations
Autor: Mehdi Dehbashi, Görschwin Fey, Kaushik Roy, Anand Raghunathan
Konferenz: 15th Euromicro Conference on Digital System Design (DSD) Pdf | Referenz: pp. 431-436, Izmir, Turkey, 2012
Functional Analysis of Circuits Under Timing
Variations
Autor: Mehdi Dehbashi, Görschwin Fey, Kaushik Roy, Anand Raghunathan
Konferenz: 17th IEEE European Test Symposium (ETS) Pdf | Referenz: pp. 177, Annecy, France, 2012
Automated Design Debugging in a Testbench-Based Verification Environment
Autor: Mehdi Dehbashi, André Sülflow, Görschwin Fey
Konferenz: 14th Euromicro Conference on Digital System Design (DSD) Pdf | Referenz: pp. 479-486, Oulu, Finland, 2011 Best Paper Candidate