Ich beschäftige mich in der Arbeitsgruppe mit der formalen Verifikation von formalen Modellen wie z. B. UML. Außerdem beschäftige ich mich mit reversiblen Schaltkreisen und Quantum Computing.
Natural Language Processing for Electronic Design Automation
Advanced Boolean Techniques
Formal Specification Level
Auf dem Weg zum Quantencomputer - Entwurf reversibler Logik
Computational Complexity of Error Metrics in Approximate Computing
Logic Synthesis for Majority based In-Memory Computing
A framework for reversible circuit complexity
Formale Spezifikationsebene
Formal Specification Level
The complexity of error metrics
Logic synthesis for RRAM-based in-memory computing
Behaviour Driven Development for Hardware Design
A PLiM computer for the IoT
metaSMT: Focus On Your Application And Not On Solver Integration
Verifying the Structure and Behavior in UML/OCL Models Using Satisfiability Solvers
Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry
Complexity of Reversible Circuits and their Quantum Implementations
Atomic distributions in crystal structures solved by Boolean satisfiability techniques
SyReC: A Hardware Description Language for the Specification and Synthesis of Reversible Circuits
Embedding of Large Boolean Functions for Reversible Logic
Ancilla-free synthesis of large reversible functions using binary decision diagrams
Upper bounds for reversible circuits based on Young subgroups
Formale Verifikation von UML-basierten Spezifikationen, Prüfung der Korrektheit von Systementwürfen vor deren Implementierung
Quantum circuits employing roots of the Pauli matrices
Trading Off Circuit Lines and Gate Costs in the Synthesis of Reversible Logic
Speci fication-Driven Model Transformation Testing
Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits
RevKit: An Open Source Toolkit for the Design of Reversible Circuits
RevKit: A Toolkit for Reversible Circuit Design