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Arbeitsgruppe Rechnerarchitektur / AGRA | Informatik | FB03 | Universität Bremen

Dr. Saeideh Shirinzadeh


Ich arbeite im Gebiet der Lösung von Optimierungsproblemen mit Hilfe probabilisitscher Techniken wie z.B. Evolutionären Algorithmen (EAs). Im Besonderen versuche ich dabei diese Konzepte zur Lösung von Mehrzieloptimierungsproblemen anzuwenden, welche häufig im elektronischen Schaltkreisentuwrf vorkommen. Mein Ziel ist eine erschöpfende Integration dieser Techniken in heutige Entwurfsabläufe.

WiMi

In-Memory-Computing
Synthese und Optimierung

Autor: Saeideh Shirinzadeh, Rolf Drechsler
Verlag: Springer
Format: DOI: 10.1007/978-3-031-22879-7, Hardcover, eBook (2023)

In-Memory Computing - Synthesis and Optimization
Autor: Saeideh Shirinzadeh, Rolf Drechsler
Verlag: Springer
Format: DOI: 10.1007/978-3-030-18026-3, Hardcover (2020)

In-Memory Computing: The Integration of Storage and Processing
Autor: Saeideh Shirinzadeh, Rolf Drechsler
Buchtitel: Information Storage A Multidisciplinary Perspective | Herausgeber: Cornelia S. Große, Rolf Drechsler
Verlag: Springer
Format: Hardcover (2019)

Logic Synthesis for Majority based In-Memory Computing
Autor: Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Buchtitel: Advances in Memristors, Memristive Devices and Systems | Herausgeber: Sundarapandian Vaidyanathan, Christos Volos
Verlag: Springer
Format: Hardcover (2017)

ReSG: A Data Structure for Verification of Majority based In-Memory Computing on ReRAM Crossbars
Autor: Kousik Bhunia, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
Zeitschrift: ACM Transactions on Embedded Computing Systems
Details: DOI: 10.1145/3615358 (2023)

Parallel Computing of Graph-Based functions in ReRAM
Autor: Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler
Zeitschrift: Journal on Emerging Technologies in Computing Systems (JETC)
Details: DOI: 10.1145/3453163, Volume 18, Issue 2, Article No. 41, pp 1–2 (2021)

Logic synthesis for RRAM-based in-memory computing
Autor: Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Zeitschrift: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Details: DOI: 10.1109/TCAD.2017.2750064, Vol. 37, no. 7, pp. 1422-1435 (2018)

Synthesis of optical circuits using binary decision diagrams
Autor: Arighna Deb, Robert Wille, Oliver Keszöcze, Saeideh Shirinzadeh, Rolf Drechsler
Zeitschrift: Integration, the VLSI Journal
Details: DOI: 10.1016/j.vlsi.2017.05.001, Volume 59, September 2017, Pages 42–51 (2017)

A PLiM computer for the IoT
Autor: Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli
Zeitschrift: Computer
Details: DOI: 10.1109/MC.2017.173, 50(6):35-40 (2017)

Time-resolved detection of diffusion limited temperature gradients inside single isolated burning droplets using Rainbow Refractometry
Autor: Christopher Rosebrock, Saeideh Shirinzadeh, Mathias Soeken, Norbert Riefler, Thomas Wriedt, Rolf Drechsler, Lutz Mädler
Zeitschrift: Combustion and Flame
Details: DOI: 10.1016/j.combustflame.2016.03.007, Volume 168, June 2016, Pages 255–269 (2016)

High Efficiency Time Redundant Hardened Latch for Reliable Circuit Design
Autor: Rahebeh Niaraki Asli, Saeideh Shirinzadeh
Zeitschrift: Journal of Electronic Testing
Details: DOI: 10.1007/s10836-013-5384-x, Volume 29, Issue 4, pp 537-544 (2013)

In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures
Autor: Fatemeh Shirinzadeh, Arighna Deb, Saeideh Shirinzadeh, Abhoy Kole, Kamalika Datta and Rolf Drechsler
Konferenz: International Conference on VLSI Design (VLSID)
Pdf | Referenz: Kolkata, India, 2024

Verification of In-Memory Logic Design Using ReRAM Crossbars
Autor: Kamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler
Konferenz: IEEE Interregional NEWCAS Conference (NEWCAS)
Pdf | Referenz: Edinburgh, Scotland, 2023

Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars
Autor: Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
Konferenz: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Tokyo, Japan, 2023

Unlocking High Resolution Arithmetic Operations within Memristive Crossbars for Error Tolerant Applications
Autor: Kamalika Datta, Saman Froehlich, Saeideh Shirinzadeh, Dev Narayan, Yadav Indranil Sengupta and Rolf Drechsler
Konferenz: IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Pdf | Referenz: Patras, Greece, 2022

Unlocking Sneak Path Analysis in Memristor Based Logic Design Styles
Autor: Kamalika Datta, Saeideh Shirinzadeh, Phrangboklang Lyngton Thangkhiew, Indranil Sengupta and Rolf Drechsler
Konferenz: Euromicro Conference on Digital System Design (DSD)
Pdf | Referenz: Gran Canaria, Spain, 2022

Multiply-Accumulate Enhanced BDD-Based Logic Synthesis on RRAM Crossbars
Autor: Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler
Konferenz: IEEE International Symposium on Circuits & Systems (ISCAS)
Pdf | Referenz: Sevilla, Spain, 2020

ComPRIMe: A Compiler for Parallel and Scalable ReRAM-based In-Memory Computing
Autor: Steffen Frerix, Saeideh Shirinzadeh, Saman Fröhlich, Rolf Drechsler
Konferenz: International Symposium on Nanoscale Architectures (NanoArch 2019)
Pdf | Referenz: Qingdao, China, 2019

Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits
Autor: Saman Fröhlich, Saeideh Shirinzadeh, Rolf Drechsler
Konferenz: IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Pdf | Referenz: Miami, Florida, USA, 2019

Logic Synthesis for In-Memory Computing using Resistive Memories
Autor: Saeideh Shirinzadeh, Rolf Drechsler
Konferenz: IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Pdf | Referenz: Hong Kong SAR, China, 2018

Logic Design using Memristors: An Emerging Technology
Autor: Saeideh Shirinzadeh, Kamalika Datta, Rolf Drechsler
Konferenz: IEEE International Symposium on Multiple-Valued Logic (ISMVL)
Pdf | Referenz: Linz, Austria, 2018

An Adaptive Prioritized ε-Preferred Evolutionary Algorithm for Approximate BDD Optimization
Autor: Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler
Konferenz: Genetic and Evolutionary Computation Conference (GECCO)
Pdf | Referenz: Berlin, Germany, 2017

Endurance Management for Resistive Logic-In-Memory Computing Architectures
Autor: Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Lausanne, Switzerland, 2017

Approximate BDD Optimization with Prioritized ε-Preferred Evolutionary Algorithm
Autor: Saeideh Shirinzadeh, Mathias Soeken, Daniel Große, Rolf Drechsler
Konferenz: Genetic and Evolutionary Computation Conference (GECCO)
Pdf | Referenz: Denver, USA, 2016

An MIG-based Compiler for Programmable Logic-in-Memory Architectures
Autor: Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: Austin, USA, 2016

Multi-Objective BDD Optimization for RRAM based Circuit Design
Autor: Saeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler
Konferenz: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS'16)
Pdf | Referenz: Košice, Slovakia, 2016

Fast Logic Synthesis for RRAM-based In-Memory Computing using Majority-Inverter Graphs
Autor: Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Dresden, Germany, 2016

Multi-Objective BDD Optimization with Evolutionary Algorithms
Autor: Saeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler
Konferenz: Genetic and Evolutionary Computation Conference (GECCO)
Pdf | Referenz: Madrid, 2015

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