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Arbeitsgruppe Rechnerarchitektur / AGRA | Informatik | FB03 | Universität Bremen

Dr. Alireza Mahzoon


Mein Forschungsgebiet ist die formale Verifikation und das Debugging von arithmetischen Schaltkreisen auf Gatterebene wobei insbesondere große und komplexe Schaltkreise zur Multiplikation und Division betrachtet werden. Diese Schaltungen spielen in verschiedenen Anwendungen eine wichtige Rolle und sie bestehen meist aus Millionen von Gattern. Im Rahmen meiner Forschung sollen Methoden auf Basis der Computer Algebra zum Einsatz kommen.

WiMi

Formal Verification of Structurally Complex Multipliers
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Verlag: Springer
Format: DOI: 10.1007/978-3-031-24571-8 (2023)

Polynomial Formal Verification of Carry Look-Ahead Adders
Autor: Alireza Mahzoon, Rolf Drechsler
Buchtitel: Advances in the Boolean Domain | Herausgeber: Bernd Steinbach
Verlag: Cambridge Scholars Publishing
Format: ISBN: 1-5275-8872-6 (2023)

Start Small But Dream Big: On Choosing a Static Variable Order for Multiplier BDDs
Autor: Khushboo Qayyum, Alireza Mahzoon, Rolf Drechsler
Buchtitel: Advanced Boolean Techniques | Herausgeber: Rolf Drechsler, Sebastian Huhn (Eds.)
Verlag: Springer
Format: DOI 10.1007/978-3-031-28916-3 (2023)

Lower bound proof for the size of BDDs representing a shifted addition
Autor: Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler
Zeitschrift: Information Processing Letters
Details: DOI: 10.1016/j.ipl.2025.106571 (2025)

RevSCA-2.0: SCA-based Formal Verification of Non-trivial Multipliers using Reverse Engineering and Local Vanishing Removal
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Zeitschrift: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
Details: DOI: 10.1109/TCAD.2021.3083682, Volume: 41 Issue: 5, pp.1573-1586 (2021)

Polynomial Formal Verification of a Processor: A RISC-V Case Study
Autor: Lennart Weingarten, Alireza Mahzoon, Mehran Goli, Rolf Drechsler
Konferenz: International Symposium on Quality Electronic Design (ISQED'23)
Pdf | Referenz: San Francisco, USA, 2023

Towards Polynomial Formal Verification of AI-Generated Arithmetic Circuits
Autor: Rolf Drechsler; Alireza Mahzoon
Konferenz: International Symposium on Devices, Circuits and Systems (ISDCS)
Referenz: DOI: 10.1109/ISDCS58735.2023.10153522, Higashi-hiroshima, Japan, 2023

Polynomial Formal Verification of Floating Point Adders
Autor: Jan Kleinekathöfer, Alireza Mahzoon, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2023

Divide and Verify: Using a Divide-and-Conquer Strategy for Polynomial Formal Verification of Complex Circuits
Autor: Rolf Drechsler, Alireza Mahzoon
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2023

Investigating Various Adder Architectures for Digital In-Memory Computing Using MAGIC-based Memristor Design Style
Autor: Chandan Kumar Jha, Alireza Mahzoon, Rolf Drechsler
Konferenz: International Conference on Emerging Electronics (ICEE)
Pdf | Referenz: Bangalore, India, 2022

Monitoring the Effects of Static Variable Orders on the Construction of BDDs
Autor: Khushboo Qayyum, Alireza Mahzoon, Rolf Drechsler
Konferenz: International Interdisciplinary Conference on Mathematics, Engineering and Science (MESIICON)
Pdf | Referenz: Virtual Conference, 2022

Polynomial Formal Verification: Ensuring Correctness under Resource Constraints
Autor: Rolf Drechsler, Alireza Mahzoon
Konferenz: International Conference on Computer Aided Design (ICCAD)
Pdf | Referenz: San Diego, USA, 2022

Divider Verification Using Symbolic Computer Algebra and Delayed Don’t Care Optimization
Autor: Alexander Konrad, Christoph Scholl, Alireza Mahzoon, Daniel Große, Rolf Drechsler
Konferenz: Formal Methods in Computer-Aided Design (FMCAD)
Pdf | Referenz: Trento, Italy, 2022

Preserving Design Hierarchy Information for Polynomial Formal Verification
Autor: Rolf Drechsler, Alireza Mahzoon
Konferenz: IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Pdf | Referenz: Patras, Greece, 2022

Design Modification for Polynomial Formal Verification
Autor: Rolf Drechsler, Alireza Mahzoon
Konferenz: 2022 International Symposium on Electrical, Electronics and Information Engineering (ISEEIE)
Pdf | Referenz: Virtual Conference, 2022

Formal Verification of Modular Multipliers using Symbolic Computer Algebra and Boolean Satisfiability
Autor: Alireza Mahzoon, Daniel Große, Christoph Scholl, Alexander Konrad, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2022

Towards Polynomial Formal Verification of Complex Arithmetic Circuits
Autor: Rolf Drechsler, Alireza Mahzoon, Mehran Goli
Konferenz: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Pdf | Referenz: Prague, Czech Republic, 2022

Polynomial Formal Verification of Arithmetic Circuits
Autor: Rolf Drechsler, Alireza Mahzoon, Lennart Weingarten
Konferenz: International Conference on Computational Intelligence and Data Engineering (ICCIDE)
Pdf | Referenz: Vijayawada, India, 2021

Polynomial Word-Level Verification of Arithmetic Circuits
Autor: Mohammed Barhoush, Alireza Mahzoon, Rolf Drechsler
Konferenz: International Conference on Formal Methods and Models for System Design (MEMOCODE)
Pdf | Referenz: Beijing, China, 2021

Polynomial Formal Verification of Prefix Adders
Autor: Alireza Mahzoon, Rolf Drechsler
Konferenz: Asian Test Symposium (ATS)
Pdf | Referenz: Virtual Conference, Japan, 2021

Automated Debugging-Aware Visualization Technique for SystemC HLS Designs
Autor: Mehran Goli, Alireza Mahzoon, Rolf Drechsler
Konferenz: Euromicro Conference on Digital System Design (DSD)
Pdf | Referenz: Palermo, Sicily, Italy, 2021

Late Breaking Results: Polynomial Formal Verification of Fast Adders
Autor: Alireza Mahzoon, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2021

Verifying Dividers Using Symbolic Computer Algebra and Don't Care Optimization
Autor: Christoph Scholl, Alexander Konrad, Alireza Mahzoon, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Grenoble, France, 2021

ASCHyRO: Automatic Fault Localization of SystemC HLS Designs Using a Hybrid Accurate Rank Ordering Technique
Autor: Mehran Goli, Alireza Mahzoon, Rolf Drechsler
Konferenz: 38th IEEE International Conference on Computer Design (ICCD)
Pdf | Referenz: Hartford, USA, 2020

Towards Formal Verification of Optimized and Industrial Multipliers
Autor: Alireza Mahzoon, Daniel Große, Christoph Scholl, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Grenoble, France, 2020

RevSCA: Using Reverse Engineering to Bring Light into Backward Rewriting for Big and Dirty Multipliers
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: Las Vegas, USA, 2019

PolyCleaner: Clean your Polynomials before Backward Rewriting to Verify Million-gate Multipliers
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Konferenz: International Conference on Computer Aided Design (ICCAD)
Pdf | Referenz: San Diego, USA, 2018
Best Paper Award

Combining Symbolic Computer Algebra and Boolean Satisfiability for Automatic Debugging and Fixing of Complex Multipliers
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Konferenz: IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Pdf | Referenz: pp. 351-356, Hong Kong SAR, China, 2018

Divider Verification Using Symbolic Computer Algebra and Delayed Don’t Care Optimization
Autor: Alexander Konrad, Christoph Scholl, Alireza Mahzoon, Daniel Große, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz: Freiburg, Germany, 2023

ANN-based Performance Estimation of Embedded Software for RISC-V Processors
Autor: Weiyan Zhang, Mehran Goli, Alireza Mahzoon, Rolf Drechsler
Workshop: International Workshop on Rapid System Prototyping (RSP)
Pdf | Referenz: Hamburg, Germany, 2022

One is not Enough: Using Hybrid Proof Engines for Polynomial Formal Verification
Autor: Rolf Drechsler, Alireza Mahzoon
Workshop: 24th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI)
Referenz: Hirosaki, Japan, 2022

Polynomial Formal Verification of Complex Multipliers
Autor: Alireza Mahzoon, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz: Virtual, 2022

Polynomial Formal Verification of Prefix Adders
Autor: Alireza Mahzoon, Rolf Drechsler
Workshop: International Workshop on Logic & Synthesis (IWLS)
Referenz: Virtual Conference, 2021

Polynomial Formal Verification of Area-efficient and Fast Adders
Autor: Alireza Mahzoon, Rolf Drechsler
Workshop: 2021 Reed-Muller Workshop (RM2021)
Pdf | Video | Referenz: Nursultan, Kazakhstan, 2021

GenMul: Generating Architecturally Complex Multipliers to Challenge Formal Verification Tools
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz: München, Germany, 2021

GenMul: Generating architecturally complex multipliers to challenge formal verification tools
Autor: Alireza Mahzoon, Daniel Große, Rolf Drechsler
Workshop: International Workshop on Logic & Synthesis (IWLS)
Referenz: Lausanne, Switzerland, 2019

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