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Group of Computer Architecture / AGRA | Computer Science | Faculty 03 | University of Bremen

Dr. Chandan Kumar Jha


My research area broadly encompasses VLSI systems' design, automation, and verification. I work on designing efficient CAD methodologies for emerging technologies. This includes automated methodologies for synthesis, formal verification, and developing benchmark circuits for emerging technologies. I am currently exploring memristor-based circuits and approximate computing.

Research Staff

+49 421 218-59837

MZH 4204

chajha@uni-bremen.de

cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits
Author: Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
Jorunal: IEEE Transactions on Circuits and Systems I: Regular Papers
Details: DOI: 10.1109/TCSI.2024.3388256, noch nicht veröffentlicht (2024)

Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style
Author: Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin Patkar, Rolf Drechsler, Farhad Merchant
Jorunal: IEEE Embedded Systems Letters (ESL)
Details: DOI: 10.1109/LES.2023.3298740 (2023)

MARADIV: Library of MAGIC based Approximate Restoring Array Divider Benchmark Circuits for In-Memory Computing Using Memristors
Author: Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
Jorunal: IEEE Transactions on Circuits and Systems II: Express Briefs
Details: DOI: 10.1109/TCSII.2023.3242976, Volume: 70 Issue: 7 (2023)

IMAGIN: Library of IMPLY and MAGIC NOR Based Approximate Adders for In-Memory Computing
Author: Chandan Kumar Jha, Phrangboklang Lyngton Thangkhiew, Kamalika Datta, Rolf Drechsler
Jorunal: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Details: DOI: 10.1109/JXCDC.2022.3222015, Volume: 8 Issue: 2 (2022)

Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification
Author: Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler
Conference: Design Automation Conference (DAC)
Reference: San Francisco, USA, 2024

Polynomial Formal Verification of Approximate Adders with Constant Cutwidth
Author: Mohamed Nadeem, Chandan Kumar Jha, Rolf Drechsler
Conference: IEEE European Test Symposium (ETS)
Pdf | Reference: The Hague, Netherlands, 2024

Hidden Cost of Circuit Design with RFETs
Author: Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Valencia, Spain, 2024

LLM-guided Formal Verification Coupled with Mutation Testing
Author: Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Valencia, Spain, 2024

Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array
Author: Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana
Conference: International Conference on VLSI Design (VLSID)
Pdf | Reference: Kolkata, India, 2024

Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic
Author: Chandan Kumar Jha, Sallar Ahmadi-Pour, Rolf Drechsler
Conference: International Conference on VLSI Design (VLSID)
Pdf | Reference: Kolkata, India, 2024

MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory
Author: Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin Patkar, Rolf Drechsler, Farhad Merchant
Conference: Asia and South Pacific Design Automation Conference (ASP-DAC)
Reference: Incheon Songdo Convensia, South Korea, 2024

Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style
Author: Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin Patkar, Rolf Drechsler, Farhad Merchant
Conference: International Conference on Hardware/Software Codesign and System Synthesis | Embedded System Week (CODES+ISSS)
Pdf | Reference: Hamburg, Germany, 2023

Hidden in Plain Sight: A Detailed Investigation of Selectively Increasing Local Density to Camouflage and Robustify Against Optical Probing Attacks
Author: Sajjad Parvin, Chandan Kumar Jha, Sallar Ahmadi-Pour, Frank Sill Torres, and Rolf Drechsler
Conference: IEEE International Test Conference India (ITC India)
Pdf | Reference: Bengaluru, India, 2023

Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core
Author: Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
Conference: IEEE INTERNATIONAL CONFERENCE ON OMNI-LAYER INTELLIGENT SYSTEMS (IEEE COINS)
Pdf | Reference: Berlin, Germany, 2023

Finite State Automata Design using 1T1R ReRAM Crossbar
Author: Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad Shafik, Alex Yakovlev, Sachin Patkar, Farhad Merchant
Conference: IEEE Interregional NEWCAS Conference (NEWCAS)
Pdf | Reference: Edinburgh, Scotland, 2023

Benchmarking Multiplier Architectures for MAGIC Based In-Memory Computing
Author: Chandan Kumar Jha, Rolf Drechsler
Conference: IEEE Interregional NEWCAS Conference (NEWCAS)
Pdf | Reference: Edinburgh, Scotland, 2023

Analysis of Quantization Across DNN Accelerator Architecture Paradigms
Author: Tom Glint, Chandan Kumar Jha, Manu Awasthi and Joycee Mekie
Conference: Design, Automation and Test in Europe Conference (DATE)
Pdf | Reference: Antwerp, Belgium, 2023

Investigating Various Adder Architectures for Digital In-Memory Computing Using MAGIC-based Memristor Design Style
Author: Chandan Kumar Jha, Alireza Mahzoon, Rolf Drechsler
Conference: International Conference on Emerging Electronics (ICEE)
Pdf | Reference: Bangalore, India, 2022

LLM-Assisted High Quality Invariants Generation for Formal Verification
Author: Khushboo Qayyum, Sallar Ahmadi-Pour, Muhammad Hassan, Chandan Kumar Jha, Rolf Drechsler
Workshop: University Fair at Design, Automation and Test in Europe (DATE)
Reference: Valencia, Spain, 2024

Automated Formal Verification Methodology for MAGIC Design Style Based In-Memory Computing
Author: Chandan Kumar Jha, Khushboo Qayyum, Kemal Çağlar Coşkun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
Workshop: International Workshop on Logic & Synthesis (IWLS)
Reference: EPFL, Lausanne, Switzerland, 2023

OPTI-RISK: Design of an Optical Probing Attack Hardened RISC-V Core with an Industrially Compatible CMOS Gate Library
Author: Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, and Rolf Drechsler
Workshop: 5th RISC-V Activity Workshop
Reference: Berlin, Germany, 2022

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