HOME | KONTAKT

Logo Universität Bremen
LOGO AGRA | AG Rechnerarchitektur



Arbeitsgruppe Rechnerarchitektur / AGRA | Informatik | FB03 | Universität Bremen

Dr. Muhammad Hassan


Mein Interessenschwerpunkt liegt im Entwurf und der Verifikation auf der ESL-Ebene auf Basis von virtuellen Prototypen. Die ESL-Methodik ermöglicht dem Entwickler eine effiziente und kosteneffektive Optimierung des Entwurfs im Vergleich zum klassischen RTL-Design. In meiner Forschung gehe ich aktuell der Frage nach, ob die Software das erwartete Verhalten (in Bezug auf Korrektheit und Effizienz) auf der Zielarchitektur zeigt

WiMi

+49 421 218-63937

MZH 4285

hassan@informatik.uni-bremen.de

Toward System-Level Assertions for Heterogeneous Systems
Autor: Muhammad Hassan, Thilo Vörtler, Karsten Einwich, Rolf Drechsler, Daniel Große
Buchtitel: Advanced Boolean Techniques | Herausgeber: Rolf Drechsler, Sebastian Huhn (Eds.)
Verlag: Springer
Format: DOI 10.1007/978-3-031-28916-3 (2023)

cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits
Autor: Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
Zeitschrift: IEEE Transactions on Circuits and Systems I: Regular Papers
Details: DOI: 10.1109/TCSI.2024.3388256 (2024)

ReSG: A Data Structure for Verification of Majority based In-Memory Computing on ReRAM Crossbars
Autor: Kousik Bhunia, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
Zeitschrift: ACM Transactions on Embedded Computing Systems
Details: DOI: 10.1145/3615358 (2023)

Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits
Autor: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Zeitschrift: Chips
Details: DOI 10.3390/chips1010006, Volume 1, Issue 1, pp. 54-71 (2022)

Security Validation of VP-based SoCs Using Dynamic Information Flow Tracking
Autor: Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
Zeitschrift: it-Information Technology
Details: DOI: 10.1515/itit-2018-0027 (2019)

Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification
Autor: Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler
Konferenz: Great Lakes Symposium on VLSI (GLSVLSI)
Referenz: Tempa Bay Area, Florida, USA , 2024

Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification
Autor: Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Referenz: San Francisco, USA, 2024

Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent
Autor: Kemal Çağlar Coşkun, Muhammad Hassan, Lars Hedrich, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2024

LLM-guided Formal Verification Coupled with Mutation Testing
Autor: Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Valencia, Spain, 2024

Security Coverage Metrics for Information Flow at the System Level
Autor: Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
Konferenz: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Incheon Songdo Convensia, South Korea, 2024

Efficient ML-Based Performance Estimation Approach across Different Microarchitectures for RISC-V Processors
Autor: Weiyan Zhang, Mehran Goli, Muhammad Hassan, Rolf Drechsler
Konferenz: Euromicro Conference Series on Digital System Design (DSD)
Pdf | Referenz: Durres, Albania, 2023

Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization Techniques
Autor: Marcel Merten, Muhammad Hassan, Rolf Drechsler
Konferenz: 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Pdf | Referenz: Tallinn, Estonia, 2023

VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking
Autor: Ece Nur Demirhan Coskun, Muhammad Hassan, Mehran Goli, Rolf Drechsler
Konferenz: International Symposium on Quality Electronic Design (ISQED'23)
Pdf | Referenz: San Francisco, USA, 2023

Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors
Autor: Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, Violetta Sessi, Maximilian Drescher, Sabine Kolodinski and Maciej Wiatr
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2023

Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits
Autor: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2023

Automated Equivalence Checking Method for Majority based In-Memory Computing on ReRAM Crossbars
Autor: Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
Konferenz: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Tokyo, Japan, 2023

A Cross-domain Heterogeneous ABV-Library for Mixed-signal Virtual Prototypes in SystemC/AMS
Autor: Muhammad Hassan, Thilo Vörtler, Karsten Einwich, Rolf Drechsler, Daniel Große
Konferenz: Design and Verification Conference in Europe (DVCon Europe)
Pdf | Referenz: Munich, Germany, 2022

Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters
Autor: Kemal Çağlar Coşkun, Muhammad Hassan, Rolf Drechsler
Konferenz: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Pdf | Referenz: Prague, Czech Republic, 2022

System Level verification of Phase-Locked Loop using Metamorphic Relations
Autor: Muhammad Hassan, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Grenoble, France, 2021

System-Level Verification of Linear and Non-Linear Behaviors of RF Amplifiers using Metamorphic Relations
Autor: Muhammad Hassan, Daniel Große, Rolf Drechsler
Konferenz: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Tokyo, Japan, 2021

Functional Coverage-Driven Characterization of RF Amplifiers
Autor: Muhammad Hassan, Daniel Große, Thilo Vörtler, Karsten Einwich and Rolf Drechsler
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: Southampton, United Kingdom, 2019
Best Paper Candidate

Automated Analysis of Virtual Prototypes at Electronic System Level
Autor: Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
Konferenz: 29th ACM Great Lakes Symposium on VLSI (GLSVLSI)
Pdf | Referenz: Washington, D.C., USA, 2019

Data Flow Testing for SystemC-AMS Timed Data Flow Models
Autor: Muhammad Hassan, Daniel Große, Hoang M. Le, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Florence, Italy, 2019

Using Constraints for SystemC AMS Design and Verification
Autor: Thilo Vörtler, Karsten Einwich, Muhammad Hassan, Daniel Große
Konferenz: Design and Verification Conference and Exhibition Europe (DVCon Europe)
Pdf | Referenz: Munich, Germany, 2018
Best Paper Award

Testbench Qualification for SystemC-AMS Timed Data Flow Models
Autor: Muhammad Hassan, Daniel Große, Hoang M. Le, Thilo Vörtler, Karsten Einwich, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: pp. 857-860, Dresden, Germany, 2018

Early SoC Security Validation by VP-based Static Information Flow Analysis
Autor: Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: International Conference on Computer Aided Design (ICCAD)
Pdf | Referenz: pp. 400-407, Irvine, USA, 2017

Data Flow Testing for Virtual Prototypes
Autor: Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Mingsong Chen, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Lausanne, Switzerland, 2017

Guided Lightweight Software Test Qualification for IP Integration using Virtual Prototypes
Autor: Daniel Große, Hoang M. Le, Muhammad Hassan, Rolf Drechsler
Konferenz: IEEE International Conference on Computer Design (ICCD)
Pdf | Referenz: Phoenix, USA, 2016

Enhancing Resilience against Sequential Attacks on Logic Locking using Evolutionary Strategies
Autor: Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Niladri Bhattacharjee, Jens Trommer, Thomas Mikolajick, Rolf Drechsler
Workshop: GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ)
Pdf | Referenz: Darmstadt, Germany, 2024

LLM-Assisted High Quality Invariants Generation for Formal Verification
Autor: Khushboo Qayyum, Sallar Ahmadi-Pour, Muhammad Hassan, Chandan Kumar Jha, Rolf Drechsler
Workshop: University Fair at Design, Automation and Test in Europe (DATE)
Referenz: Valencia, Spain, 2024

Towards Completeness: Security Coverage for System Level IFT
Autor: Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Pdf | Referenz: Landau, Germany, 2024

Towards ML-based Performance Estimation of Embedded Software: A RISC-V Case Study
Autor: Weiyan Zhang, Muhammad Hassan, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Pdf | Referenz: Landau, Germany, 2024

Automated Formal Verification Methodology for MAGIC Design Style Based In-Memory Computing
Autor: Chandan Kumar Jha, Khushboo Qayyum, Kemal Çağlar Coşkun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
Workshop: International Workshop on Logic & Synthesis (IWLS)
Referenz: EPFL, Lausanne, Switzerland, 2023

Expanding RISC-V Horizons: Streamlining Heterogeneous Systems Evaluation with Open Source RISC-V AMS VP Framework
Autor: Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
Workshop: RISC-V Summit Europe
Pdf | Referenz: Barcelona, Spain, 2023

Security Validation of VP-based Heterogeneous Systems: A Completeness-driven Perspective
Autor: Ece Nur Demirhan Coskun, Muhammad Hassan, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Pdf | Referenz: Freiburg, Germany, 2023

New Directions for Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits
Autor: Kemal Çağlar Coşkun, Muhammad Hassan and Rolf Drechsler
Workshop: 35. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ)
Pdf | Referenz: Erfurt, Germany, 2023

HLS-ing Up RISC-V: Streamlining Design and Optimization
Autor: Deepak Ravibabu, Muhammad Hassan and Rolf Drechsler
Workshop: University Fair at Design, Automation and Test in Europe (DATE)
Referenz: Antwerpen, Belgien, 2023

Towards System-level Assertions for Heterogeneous Systems
Autor: Muhammad Hassan, Thilo Voertler, Karsten Einwich, Rolf Drechsler,Daniel Grosse
Workshop: 15th International Workshop on Boolean Problems (IWSBP)
Pdf | Referenz: Bremen, Germany, 2022

System Level Verification of Analog/Mixed-Signal Systems using Metamorphic Relations
Autor: Muhammad Hassan and Rolf Drechsler
Workshop: 34. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ)
Pdf | Referenz: Bremerhaven, Germany, 2022

Coverage-Directed Stimuli Generation for Characterization of RF Amplifiers
Autor: Muhammad Hassan, Daniel Große, Ahmad Asghar, Rolf Drechsler
Workshop: 32. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2020)
Pdf | Referenz: Stuttgart, Germany, 2020

« zurück


©2023 | AG Rechnerarchitektur | Kontakt | Impressum & Datenschutz