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Arbeitsgruppe Rechnerarchitektur / AGRA | Informatik | FB03 | Universität Bremen

Dr. Vladimir Herdt


Mein Interessenschwerpunkt liegt in der Verifikation von Systemen auf hoher Abstraktionsebene. Zurzeit befasse ich mich insbesondere mit vollautomatischen formalen Methoden zur Eigenschaftsprüfung sowie Fehlersuche in SystemC (TLM) Modellen. Die inherente Nebenläufigkeit der Modelle, sowie die große Menge an möglichen Eingaben, erfordern spezielle Beweistechniken.

WiMi

Verbessertes virtuelles Prototyping
Mit RISC-V-Fallstudien

Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Verlag: Springer
Format: DOI: 10.1007/978-3-031-18174-0, Hardcover, eBook (2023)

Enhanced Virtual Prototyping: Featuring RISC-V Case Studies
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Verlag: Springer
Format: DOI: 10.1007/978-3-030-54828-5, Hardcover (2020)

Complete Symbolic Simulation of SystemC Models: Efficient Formal Verification of Finite Non-Terminating Programs
Autor: Vladimir Herdt
Verlag: Springer
Format: Softcover (2016)

Verbessertes Virtual Prototyping für den Entwurfsablauf
Autor: Vladimir Herdt
Buchtitel: Ausgezeichnete Informatikdissertationen 2020 | Herausgeber: S. Hölldobler et al.
Verlag: GI
Format: Paperback (2021)

Extensible and Configurable RISC-V Based Virtual Prototype
Autor: Vladimir Herdt, Daniel Große, Hoang M. Le, Rolf Drechsler
Buchtitel: Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL 2018 | Herausgeber: Tom J. Kazmierski, Sebastian Steinhorst, Daniel Große
Verlag: Springer
Format: Hardcover (2020)

Towards Early Validation of Firmware-Based Power Management Using Virtual Prototypes: A Constrained Random Approach
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Buchtitel: Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL 2017 | Herausgeber: Daniel Große, Sara Vinco, Hiren Patel
Verlag: Springer
Format: Hardcover (2019)

On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-Based Error Effect Simulation: A Case Study
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Buchtitel: Languages, Design Methods, and Tools for Electronic System Design: Selected Contributions from FDL 2016 | Herausgeber: Franco Fummi, Robert Wille
Verlag: Springer
Format: Hardcover (2018)

Synergistic Verification of Hardware Peripherals through Virtual Prototype Aided Cross-Level Methodology Leveraging Coverage-Guided Fuzzing and Co-Simulation
Autor: Sallar Ahmadi-Pour, Mathis Logemann, Vladimir Herdt, Rolf Drechsler
Zeitschrift: Chips
Details: DOI: 10.3390/chips2030012, Volume 2, Issue 3, pp. 195-208 (2023)

Specification-based Symbolic Execution for Stateful Network Protocol Implementations in the IoT
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Zeitschrift: IEEE Internet of Things Journal
Details: DOI: 10.1109/JIOT.2023.3236694, Volume: 10 Issue: 11 (2023)

The MicroRV32 framework: An Accessible and Configurable Open Source RISC-V Cross-Level Platform for Education and Research
Autor: Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Zeitschrift: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/j.sysarc.2022.102757, Volume 133, 2022 (2022)

Advanced Embedded System Modeling and Simulation in an Open Source RISC-V Virtual Prototype
Autor: Pascal Pieper, Vladimir Herdt and Rolf Drechsler
Zeitschrift: Journal of Low Power Electronics and Applications
Details: DOI: 10.3390/jlpea12040052, 12(4):52 (2022)

Towards Quantification and Visualization of the Effects of Concretization during Concolic Testing
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Zeitschrift: IEEE Embedded Systems Letters (ESL)
Details: DOI: 10.1109/LES.2022.3171603, Volume: 14 Issue: 4 (2022)

SymEx-VP: An Open Source Virtual Prototype for OS-Agnostic Concolic Testing of IoT Firmware
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Zeitschrift: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/ j.sysarc.2022.102456, Volume 126 (2022)

Advanced Virtual Prototyping for Cyber-Physical Systems using RISC-V: Implementation, Verification and Challenges
Autor: Vladimir Herdt, Rolf Drechsler
Zeitschrift: Science China Information Sciences (SCIS)
Details: DOI: 10.1007/s11432-020-3308-4 (2021)

Towards RISC-V CSR Compliance Testing
Autor: Niklas Bruns, Vladimir Herdt, Daniel Große, Rolf Drechsler
Zeitschrift: IEEE Embedded Systems Letters (ESL)
Details: DOI: 10.1109/LES.2021.3077368, Volume: 13 Issue: 4, pp. 202-205 (2021)

Adaptive Simulation with Virtual Prototypes in an Open-Source RISC-V Evaluation Platform
Autor: Vladimir Herdt, Daniel Große, Sören Tempel, Rolf Drechsler
Zeitschrift: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/j.sysarc.2021.102135, Volume 116 (2021)

RISC-V based Virtual Prototype: An Extensible and Configurable Platform for the System-level
Autor: Vladimir Herdt, Daniel Große, Pascal Pieper, Rolf Drechsler
Zeitschrift: Journal of Systems Architecture - Embedded Software Design (JSA)
Details: DOI: 10.1016/j.sysarc.2020.101756, Volume 109 (2020)

Combining Sequentialization-based Verification of Multi-Threaded C Programs with Symbolic Partial Order Reduction
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Zeitschrift: International Journal of Software Tools for Technology Transfer (STTT)
Details: DOI: 10.1007/s10009-019-00507-5, 21(5):545-565 (2019)

Verifying SystemC using Intermediate Verification Language and Stateful Symbolic Simulation
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Zeitschrift: IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD)
Details: DOI: 10.1109/TCAD.2018.2846638, 38(7):1359-1372 (2018)

Identification of ISA-Level Mutation-Classes for Qualification of RISC-V Formal Verification
Autor: Milan Funck, Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Turin, Italy, 2023

Coverage-guided Fuzzing for Plan-based Robotics
Autor: Tim Meywerk, Vladimir Herdt, Rolf Drechsler
Konferenz: 15th International Conference on Agents and Artificial Intelligence (ICAART)
Pdf | Referenz: Lissabon, Portugal, 2023

Processor Verification using Symbolic Execution: A RISC-V Case-Study
Autor: Niklas Bruns, Vladimir Herdt, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2023

Symbolic Fault Injection for Plan-based Robotics
Autor: Tim Meywerk, Vladimir Herdt, Rolf Drechsler
Konferenz: The 22nd International Conference on Control, Automation and Systems (ICCAS)
Pdf | Referenz: Busan, Korea, 2022

Virtual Prototype based Analysis of Neural Network Cache Behavior for Tiny Edge Device
Autor: Alexander Fratzer, Vladimir Herdt, Christoph Lüth, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Linz, Austria, 2022

Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-Verification
Autor: Niklas Bruns, Vladimir Herdt, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Linz, Austria, 2022

3D Visualization of Symbolic Execution Traces
Autor: Jan Zielasko, Sören Tempel, Vladimir Herdt, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Linz, Austria, 2022

SISL: Concolic Testing of Structured Binary Input Formats via Partial Specification
Autor: Sören Tempel, Vladimir Herdt and Rolf Drechsler
Konferenz: Automated Technology for Verification and Analysis (ATVA)
Pdf | Referenz: Beijing, China, 2022

Simulation-Based Debugging of Formal Environment Models
Autor: Tim Meywerk, Arthur Niedzwiecki, Vladimir Herdt and Rolf Drechsler
Konferenz: The 30th Mediterranean Conference on Control and Automation (MED)
Pdf | Referenz: Athen, Griechenland, 2022

Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems: A RISC-V Case-Study
Autor: Sallar Ahmadi-Pour, Sangeet Saha, Vladimir Herdt, Rolf Drechsler and Klaus McDonald-Maier
Konferenz: Euromicro Conference on Digital System Design (DSD)
Pdf | Referenz: Gran Canaria, Spain, 2022

Advanced Environment Modeling and Interaction in an Open Source RISC-V Virtual Prototype
Autor: Pascal Pieper, Vladimir Herdt, Rolf Drechsler
Konferenz: Great Lakes Symposium on VLSI (GLSVLSI)
Referenz: Irvine, CA, USA, 2022

Efficient Cross-Level Processor Verification using Coverage-guided Fuzzing
Autor: Niklas Bruns, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Great Lakes Symposium on VLSI (GLSVLSI)
Pdf | Referenz: Irvine, CA, USA, 2022

Verifying SystemC TLM Peripherals using Modern C++ Symbolic Execution Tools
Autor: Pascal Pieper, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2022

Virtual Prototype driven Design, Implementation and Evaluation of RISC-V Instruction Set Extensions
Autor: Milan Funck, Vladimir Herdt, Rolf Drechsler
Konferenz: 25th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
Pdf | Referenz: Prague, Czech Republic, 2022

The Scale4Edge RISC-V Ecosystem
Autor: Wolfgang Ecker, Milos Krstic, Andreas Mauderer, Eyck Jentzsch, Mihaela Damian, Julian Oppermann, Andreas Koch, Peer Adelt, Wolfgang Müller, Vladimir Herdt, Rolf Drechsler, Rafael Stahl, Karsten Emrich, Daniel Müller-Gritschneder, Jan Schlamelcher, Kim Grüttner, Jörg Bormann, Wolfgang Kunz, Reinhold Heckmann, Gerhard Angst, Ralf Wimmer, Bernd Becker, Philipp Scholl, Paul Palomero Bernardo, Oliver Bringmann, Johannes Partzsch, Christian Mayr
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2022

Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
Autor: Niklas Bruns, Vladimir Herdt, Eyck Jentzsch, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Antwerp, Belgium, 2022

Automated Detection of Spatial Memory Safety Violations for Constrained Devices
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Konferenz: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Taipei, Taiwan, 2022

Metamorphic Testing for Processor Verification: A RISC-V Case Study at the Instruction Level
Autor: Frank Riese, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
Pdf | Referenz: Virtual Conference, Singapore, 2021

RISC-V AMS VP: An Open Source Evaluation Platform for Cyber-Physical Systems
Autor: Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Antibes, France, 2021

In-Vivo Stack Overflow Detection and Stack Size Estimation for Low-End Multithreaded Operating Systems using Virtual Prototypes
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Antibes, France, 2021

Towards Reliable Spatial Memory Safety for Embedded Software by Combining Checked C with Concolic Testing
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2021

Vertical IP Protection of the Next-Generation Devices: Quo Vadis?
Autor: Shubham Rai, Siddharth Garg, Christian Pilato, Vladimir Herdt, Elmira Moussavi, Dominik Sisejkovic, Ramesh Karri, Rolf Drechsler, Farhad Merchant, Akash Kumar
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Grenoble, France, 2021

An Effective Methodology for Integrating Concolic Testing with SystemC-based Virtual Prototypes
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe Conference (DATE)
Pdf | Referenz: Grenoble, France, 2021

Mutation-based Compliance Testing for RISC-V
Autor: Vladimir Herdt, Sören Tempel, Daniel Große, Rolf Drechsler
Konferenz: Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Tokyo, Japan, 2021

Adaptive Simulation with Virtual Prototypes for RISC-V: Switching Between Fast and Accurate at Runtime
Autor: Vladimir Herdt, Daniel Große, Sören Tempel, Rolf Drechsler
Konferenz: 38th IEEE International Conference on Computer Design (ICCD)
Pdf | Referenz: Hartford, USA, 2020

Verifying Safety Properties of Robotic Plans operating in Real-World Environments via Logic-based Environment Modeling
Autor: Tim Meywerk, Marcel Walter, Vladimir Herdt, Jan Kleinekathöfer, Daniel Große, Rolf Drechsler
Konferenz: 9th International Symposium On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA)
Pdf | Referenz: Rhodes, Greece, 2020

Efficient Cross-Level Testing for Processor Verification: A RISC-V Case-Study
Autor: Vladimir Herdt, Daniel Große, Eyck Jentzsch, Rolf Drechsler
Konferenz: Forum on Specification & Design Languages (FDL)
Pdf | Referenz: Kiel, Germany, 2020
Best Paper Award

RVX - A Tool for Concolic Testing of Embedded Binaries Targeting RISC-V Platforms
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Automated Technology for Verification and Analysis (ATVA)
Pdf | Referenz: Hanoi, Vietnam, 2020

Efficient Techniques to Strongly Enhance the Virtual Prototype based Design Flow
Autor: Vladimir Herdt, Rolf Drechsler
Konferenz: IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
Pdf | Referenz: Limassol, Cyprus, 2020

Verification of Embedded Binaries using Coverage-guided Fuzzing with SystemC-based Virtual Prototypes
Autor: Vladimir Herdt, Daniel Große, Jonas Wloka, Tim Güneysu, Rolf Drechsler
Konferenz: 30th ACM Great Lakes Symposium on VLSI (GLSVLSI)
Pdf | Referenz: Beijing, China, 2020

Closing the RISC-V Compliance Gap: Looking from the Negative Testing Side
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2020

Dynamic Information Flow Tracking for Embedded Binaries using SystemC-based Virtual Prototypes
Autor: Pascal Pieper, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, USA, 2020

Towards Specification and Testing of RISC-V ISA Compliance
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Grenoble, France, 2020

Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Grenoble, France, 2020

Systematic RISC-V based Firmware Design
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler, Christoph Gerum, Alexander Jung, Joscha-Joel Benz, Oliver Bringmann, Michael Schwarz, Dominik Stoffel, Wolfgang Kunz
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: Southampton, United Kingdom, 2019

Towards Formal Verification of Plans for Cognition-enabled Autonomous Robotic Agents
Autor: Tim Meywerk, Marcel Walter, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: EUROMICRO Digital System Design Conference (DSD)
Pdf | Referenz: Kallithea - Chalkidiki, Greece, 2019

Early Concolic Testing of Embedded Binaries with Virtual Prototypes: A RISC-V Case Study
Autor: Vladimir Herdt, Daniel Große, Hoang M. Le, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: Las Vegas, USA, 2019

Verifying Instruction Set Simulators using Coverage-guided Fuzzing
Autor: Vladimir Herdt, Daniel Große, Hoang M. Le, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Florence, Italy, 2019

Maximizing Power State Cross Coverage in Firmware-based Power Management
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: 24th Asia and South Pacific Design Automation Conference (ASP-DAC)
Pdf | Referenz: Tokyo, Japan, 2019

Extensible and Configurable RISC-V based Virtual Prototype
Autor: Vladimir Herdt, Daniel Große, Hoang M. Le, Rolf Drechsler
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: Munich, Germany, 2018

Resiliency Evaluation via Symbolic Fault Injection on Intermediate Code
Autor: Hoang M. Le, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: pp. 845-850, Dresden, Germany, 2018

Towards Fully Automated TLM-to-RTL Property Refinement
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: pp. 1508-1511, Dresden, Germany, 2018

Towards Early Validation of Firmware-Based Power Management using Virtual Prototypes: A Constrained Random Approach
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: pp. 1-8, Verona, Italy, 2017
Best Paper Candidate

Early SoC Security Validation by VP-based Static Information Flow Analysis
Autor: Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: International Conference on Computer Aided Design (ICCAD)
Pdf | Referenz: pp. 400-407, Irvine, USA, 2017

Data Flow Testing for Virtual Prototypes
Autor: Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Mingsong Chen, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Lausanne, Switzerland, 2017

On the Application of Formal Fault Localization to Automated RTL-to-TLM Fault Correspondence Analysis for Fast and Accurate VP-based Error Effect Simulation - A Case Study
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: Forum on specification & Design Languages (FDL)
Pdf | Referenz: Bremen, Germany, 2016
Best Paper Candidate

Compiled Symbolic Simulation for SystemC
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: International Conference on Computer Aided Design (ICCAD)
Pdf | Referenz: Austin, USA, 2016

ParCoSS: Efficient Parallelized Compiled Symbolic Simulation
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Konferenz: International Conference on Computer Aided Verification (CAV)
Pdf | Referenz: Toronto, Canada, 2016

Towards Formal Verification of Real-World SystemC TLM Peripheral Models - A Case Study
Autor: Hoang M. Le, Vladimir Herdt, Daniel Große, Rolf Drechsler
Konferenz: Design, Automation and Test in Europe (DATE)
Pdf | Referenz: pp. 1160-1163, Dresden, Germany, 2016

Verifying SystemC using Stateful Symbolic Simulation
Autor: Vladimir Herdt, Hoang M. Le, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: San Francisco, 2015

Verifying SystemC using an Intermediate Verification Language and Symbolic Simulation
Autor: Hoang M. Le, Daniel Große, Vladimir Herdt, Rolf Drechsler
Konferenz: Design Automation Conference (DAC)
Pdf | Referenz: pp. 116:1-6 Austin, Texas, 2013

Symbolic Execution for RISC-V Embedded Software Using SystemC Peripheral Models
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Workshop: 3rd International KLEE Workshop on Symbolic Execution
Video | Referenz: London, 2022

Automated Testing of RIOT modules using SymEx-VP
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Workshop: RIOT Summit
Video | Referenz: Hamburg, Germany, 2022

RISC-V Processor Verification with Coverage-guided Aging
Autor: Niklas Bruns, Vladimir Herdt, Eyck Jentzsch, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Pdf | Referenz: Virtual, 2022

Verification of RISC-V Embedded Software by Integrating Concolic Testing with SystemC-based Virtual Prototypes
Autor: Sören Tempel, Vladimir Herdt, Rolf Drechsler
Workshop: 4th Workshop on RISC-V Activities
Referenz: Virtual Conference, 2021

MicroRV32: An Open Source RISC-V Cross-Level Platform for Education and Research
Autor: Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Workshop: Design Automation for CPS and IoT (DESTION)
Pdf | Referenz: Nashville, USA, 2021

Constrained Random Verification for RISC-V: Overview, Evaluation and Discussion
Autor: Sallar Ahmadi-Pour, Vladimir Herdt, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Pdf | Referenz: München, Germany, 2021

VP-based DIFT for Embedded Binaries: A RISC-V Case Study
Autor: Pascal Pieper, Vladimir Herdt, Daniel Große, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz: München, Germany, 2021

MicroRV32: A SpinalHDL based RISC-V Implementation for FPGAs
Autor: Sallar Ahmadi-Pour, Vladimir Herdt and Rolf Drechsler
Workshop: University Booth at Design, Automation and Test in Europe (DATE)
Pdf | Referenz: Grenoble, France, 2021

Efficient Techniques to Boost RISC-V Compliance Testing
Autor: Vladimir Herdt and Rolf Drechsler
Workshop: Workshop on Interdependent Challenges of Reliability, Security and Quality (RESCUE)
Referenz: Grenoble, France, 2021

Fuzz-Testing RISC-V Simulators
Autor: Vladimir Herdt, Daniel Große, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz: Stuttgart, Germany, 2020

Evaluation of Power State Cross Coverage in Firmware-Based Power Management
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Workshop: Embedded Software for Industrial IoTs (ESIIT)
Referenz: Dresden, Germany, 2018

Towards Automated Refinement of TLM Properties to RTL
Autor: Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Referenz: Tübingen, Germany, 2018

Revisiting Symbolic Software-implemented Fault Injection
Autor: Hoang M. Le, Vladimir Herdt, Daniel Große, Rolf Drechsler
Workshop: 2nd International Workshop on Resiliency in Embedded Electronic Systems (REES)
Referenz: Lausanne, Switzerland, 2017

SystemC Verifikation mittels symbolischer Simulation einer Zwischensprache
Autor: Hoang M. Le, Daniel Große, Vladimir Herdt, Rolf Drechsler
Workshop: edaWorkshop
Pdf | Referenz: pp. 53-58, Dresden, Germany, 2013

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